PRACTICAL DESIGN OF HARTLEY OSCILLATOR USING BJT

EDITOR: B. SOMANATHAN NAIR

1. INTRODUCTION

Hartley oscillators are high-frequency oscillators operating in the radio-frequency ranges. They are characterized by the B network which consists of two inductors L₁ and L₂ and a capacitor C connected as shown in Fig. 1. Since L’s and C’s are ideally lossless passive devices, we find that the feedback network is lossless. Therefore, the amplifier used in the Hartley oscillator ideally needs to have a gain slightly greater than unity. In this blog, we give the designs of four varieties of Hartley oscillator.

 

 I. DESIGN OF RC-COUPLED COMMON-EMITTER HARTLEY

Figure 2 shows the RC-coupled CE Hartley oscillator. In this, the B network is coupled to the CE amplifier using RC coupling.

1. SPECIFICATIONS

·         Output swing                                     :           4.5 V (peak)

·         Frequency of oscillation                    :           1 MHz

·         Current swing                                    :           1 mA

2. DESIGN PROCEDURE

Step 1: Selection of Transistor

Normally, the transistor selected must be capable for operation in the desired frequency range. It has been found that BC107 transistor, though termed as an audio-frequency transistor, has very good high frequency properties. From data manuals, we find that the unity-gain transition frequency f_T of BC 107 is about 150 MHz. According to the Barkhausen criteria, the gain required for producing oscillations is only unity. This means that we can generate oscillations up to 150 MHz, at least theoretically, using BC 107.  However, due to loading effects, it is seen that the maximum operating frequency is greatly reduced. It may be noted here that it is easy to generate oscillations up to 8 MHz, using BC107.

 

Steps 2 to 6: Design of the Standard Amplifier

First, as usual, we design the Standard Amplifier as described in a previous blog. As the feedback network in this case is LC, the losses (i.e., attenuation) occurring in it is usually very minimum. Hence, the associated amplifier need not have a gain that is much greater than unity. We, therefore, can employ partial feedback to get the desired gain. Sometimes, excess gain of the amplifier has to be reduced further by employing additional attenuating networks.

Step 7: Design of the Feedback Network

The feedback network consists of two inductors and a capacitor, as shown in Fig. 2. The expression for the frequency of oscillation may be written as:

                                  f_o= 1/2π√(LC)    (1)                                                                                               

where L = L₁+L₂±2M, L₁ and L₂ are the self-inductances, and M is the mutual inductance of the coils used. Usually, the effect of M can be neglected from the design, if the inductors are loosely coupled. Now, from the analysis of the circuit, the voltage gain

                                                          A_v = L₁/L₂     (2)                                                               

In our design, we fix

                                                                     L₁ = L₂                                                                              

This makes the requirement on the voltage gain

                                                   A_v = 1                                                         

As stated earlier, in the case of LC oscillators, the associated amplifier need to have a gain, which is only slightly greater than unity. However, if L₁ > L₂, then A_v can be less than unity. But, if L₁ < L₂, then A_v must be greater than unity.

Now, to design the feedback network, we first choose capacitor C. From experience, we choose C to be in the picofarads range. A typical value suitable for selection would be

                                    C = 100 pF

For precise adjustments in the frequency, we may add a trimmer capacitor of 30 pF in parallel to the 100-pF capacitor. Now, from Eq. (1), we get

                                                L = 1/4π²f_oC = 1/4 π²x10⁶X100X10^‒12= 253 μH   

                                                                                   

We therefore choose

                                                            L₁ = L₂ = 253 μH

There are two coupling capacitors connecting the B network to the collector and base, as shown in Fig. 2. They are chosen to be very high in comparison with C in the B network so that their effect can be neglected. Typically, we select 10-μF capacitors as coupling capacitors. Figure 3 shows the completely designed RC-coupled CE Hartley oscillator. The output in this case would be (V_CC ‒ V_RE)/2.

 

II. LC-COUPLED CE HARTLEY OSCILLATOR

In the LC-coupled CE Hartley oscillator, two inductors L₁ and L₂ are connected in series to form a single large inductor with a centre tap, as shown in Fig. 4. A capacitor C is connected across the inductor to form a resonant circuit. This inductor-capacitor combination forms the B network. We notice that this network also acts as the load impedance of the amplifier replacing collector resistor R_C.  As DC resistance of the inductor is negligible, the DC load line will be approximately vertical, with V_CC as the intercept on the X axis, as shown in Fig. 5. From the figure, we also notice that V_CE = V_CC, and hence the swing of the amplifier will be approximately 2V_CC. The actual swing depends on the DC resistance of the inductor and also on the value of R_E. The efficiency of the LC circuit is almost twice that of the RC type.

 

  

In this design, the centre tap of the inductor is connected to V_CC· This allows proper DC biasing, and at the same time keeps one terminal of each inductor at ac ground potential, a fundamental requirement of any Hartley oscillator B network. Of the other two free terminals of the inductor, one is connected directly to the collector and the other connected to the base through a feedback capacitor and a pot, as shown.  The pot is used to adjust the amount of feedback through the capacitor, and control the gain of the amplifier so that the waveform generated will be a pure sine wave.

Since the efficiency of the circuit is very high due to LC-coupling, and the losses are a minimum due to the LC feedback network, as stated earlier, the amplifier used need not have a gain much higher than unity. In order to reduce the excess gain, we adopt current-series feedback by removing the emitter bypass capacitor. Now, by adjusting the pot, we can control the gain to the required level to get pure sine wave across the output terminals.

1.  SPECIFICATIONS

·     Output swing                                    :           18 V (peak-to-peak)

·     Frequency of oscillation                   :           1 MHz

·     Current swing                                  :           1 mA

2.  DESIGN PROCEDURE

Steps 1 to 7: Design of the Amplifier and B Network

As in the case of RC Hartley, first we design the Standard Amplifier and the B network. Notice that there is no change in the supply voltage fixed at 10 V. However, as explained above, the output swing will be around double this value, say, about 18 to 19 volts.

Step 8: Design of the Feedback Coupling Capacitor

This is the capacitor connecting the top end of the inductor back to the base of the transistor, as shown in Fig. 6. We also connect a pot in series with this capacitor, as shown therein. This capacitor is designed in the same way we design the coupling capacitor of an amplifier. Since we are dealing with very high frequencies, the value of this capacitor need be correspondingly smaller. Typically, we may choose

                                    C_F = 0.01 mF

The value of the pot is chosen such that it will reduce the excess gain to give a purely sinusoidal waveform. Typical value of the pot may be 100 k. The completely designed amplifier is shown in Fig. 6.

 

 In the next blog, we shall discuss the designs of the common-base and common-collector Hartley oscillators.